{"dataType":"CVE_RECORD","dataVersion":"5.2","cveMetadata":{"cveId":"CVE-2024-42279","assignerOrgId":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","state":"PUBLISHED","assignerShortName":"Linux","dateReserved":"2024-07-30T07:40:12.261Z","datePublished":"2024-08-17T09:08:46.829Z","dateUpdated":"2026-08-05T11:36:18.076Z"},"containers":{"cna":{"providerMetadata":{"orgId":"416baaa9-dc9f-4396-8d5f-8c081fb06d67","shortName":"Linux","dateUpdated":"2026-08-05T11:36:18.076Z"},"descriptions":[{"lang":"en","value":"In the Linux kernel, the following vulnerability has been resolved:\n\nspi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer\n\nWhile transmitting with rx_len == 0, the RX FIFO is not going to be\nemptied in the interrupt handler. A subsequent transfer could then\nread crap from the previous transfer out of the RX FIFO into the\nstart RX buffer. The core provides a register that will empty the RX and\nTX FIFOs, so do that before each transfer."}],"metrics":[{"cvssV3_1":{"version":"3.1","vectorString":"CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H","baseScore":7.8,"baseSeverity":"HIGH"},"scenarios":[{"lang":"en","value":"AV:L - The vulnerable `mchp_corespi_transfer_one()` path is entered from the SPI core, reachable locally through spidev ioctls (`SPI_IOC_MESSAGE`) or by driving any in-kernel SPI client; no network or physical access to the board is needed.\nAC:L - The attacker can reliably dirty the RX FIFO with back-to-back transfers (including transfers larger than the 32-byte FIFO that provoke `INT_RX_CHANNEL_OVERFLOW`, or aborted transfers), and the residue is sticky rather than probabilistic, so no condition outside the attacker's control is required.\nPR:L - Only ordinary local access to an SPI device node (commonly group-accessible on embedded platforms) or the ability to trigger an SPI client is needed; there is no capability check anywhere on the path from the ioctl to `transfer_one`.\nUI:N - The attacker issues the transfers themselves and the stale-FIFO condition persists on its own; no victim action is required.\nS:U - The impact stays within the kernel and the SPI controller managed by it; no VM, IOMMU, or sandbox boundary is crossed.\nC:H - Bytes clocked in during a previous transaction — from any device on the shared bus, including a TPM, secure element, or the boot/root SPI flash — are copied into the attacker's RX buffer, and the leak can be repeated indefinitely, so security-critical data transiting the bus can be siphoned across driver and process boundaries.\nI:H - Residue from the attacker's own transaction is prepended into the next client's `rx_buf`, and an attacker transacting with a readback-capable slave controls those bytes exactly, allowing chosen data to be injected into another driver's input — e.g. corrupting a secure-element/TPM response or data read from the root flash.\nA:H - The residue count never clears, so once the FIFO fills every subsequent transfer overflows and returns garbage, permanently breaking every device on the controller (rootfs SPI-NOR, watchdog, sensors) until reboot, with SPI core transfer timeouts and `dev_err` spam."}]}],"affected":[{"product":"Linux","vendor":"Linux","defaultStatus":"unaffected","repo":"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git","programFiles":["drivers/spi/spi-microchip-core.c"],"versions":[{"version":"9ac8d17694b66d54b13e9718b25c14ca36dbebbd","lessThan":"3feda3677e8bbe833c3a62a4091377a08f015b80","status":"affected","versionType":"git"},{"version":"9ac8d17694b66d54b13e9718b25c14ca36dbebbd","lessThan":"45e03d35229b680b79dfea1103a1f2f07d0b5d75","status":"affected","versionType":"git"},{"version":"9ac8d17694b66d54b13e9718b25c14ca36dbebbd","lessThan":"9cf71eb0faef4bff01df4264841b8465382d7927","status":"affected","versionType":"git"}]},{"product":"Linux","vendor":"Linux","defaultStatus":"affected","repo":"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git","programFiles":["drivers/spi/spi-microchip-core.c"],"versions":[{"version":"6.0","status":"affected"},{"version":"0","lessThan":"6.0","status":"unaffected","versionType":"semver"},{"version":"6.6.44","lessThanOrEqual":"6.6.*","status":"unaffected","versionType":"semver"},{"version":"6.10.3","lessThanOrEqual":"6.10.*","status":"unaffected","versionType":"semver"},{"version":"6.11","lessThanOrEqual":"*","status":"unaffected","versionType":"original_commit_for_fix"}]}],"cpeApplicability":[{"nodes":[{"operator":"OR","negate":false,"cpeMatch":[{"vulnerable":true,"criteria":"cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*","versionStartIncluding":"6.0","versionEndExcluding":"6.6.44"},{"vulnerable":true,"criteria":"cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*","versionStartIncluding":"6.0","versionEndExcluding":"6.10.3"},{"vulnerable":true,"criteria":"cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*","versionStartIncluding":"6.0","versionEndExcluding":"6.11"}]}]}],"references":[{"url":"https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80"},{"url":"https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75"},{"url":"https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927"}],"title":"spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer","x_generator":{"engine":"bippy-1.2.0"}},"adp":[{"metrics":[{"other":{"type":"ssvc","content":{"id":"CVE-2024-42279","role":"CISA Coordinator","options":[{"Exploitation":"none"},{"Automatable":"no"},{"Technical Impact":"partial"}],"version":"2.0.3","timestamp":"2024-09-10T16:11:42.802690Z"}}}],"title":"CISA ADP Vulnrichment","providerMetadata":{"orgId":"134c704f-9b21-4f2e-91b3-4a467353bcc0","shortName":"CISA-ADP","dateUpdated":"2024-09-12T17:33:31.191Z"}}]}}